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STM32F3 discovery and MEMS

STM32F3 discovery and MEMS

Reading Giovanni Di Sirio’s tweet announcing the release of ChibiOS/RT 3.0.0 preview, the reaction was enthusiasm. So I dusted off my first love, the STM32F3 discovery, to give a try to this new version of the Lizard. A few hours later took shape the demo we are going to discuss in this article.

We will show how to alternately read the data from the two MEMS mounted on the discovery and made some LED games according to read data.

Before starting, we link the “must-read” documentation for optimal use of the micro-controller:

STM32F303VC Reference Manual STM32F303VC continue reading...

Sampling and dimming (ADC and PWM)

Sampling and Dimming

An Analog to digital converter is a device that converts a continuous physical quantity (usually voltage) to a digital number that represents the quantity’s amplitude.

In this demo, we are sampling voltage across a potentiometer to establish its position. A potentiometer is a three-pin knob that provides a variable resistance between W-A and W-B pins (Fig.1). Amount of resistance between A and B is constant, but by turning the shaft of the potentiometer, we change the amount of resistance on either side of W.

Connecting A to 3 V, B to GND (or vice versa) and sampling continue reading...

Meeting SPI

Meeting SPI

Communicating by a serial bus instead of a parallel one could be very useful when we need to send out a big number of words or fixing a constraint on wires. The Serial Peripheral Interface bus, also known as SPI bus, is a synchronous, serial communication peripheral which communicates in full duplex mode using a master-slave architecture with a single master. That means we have always a single master and one or more slaves. The communications is bi-directional (i.e. data flows from master to slave but also from slave to master). Since this bus is synchronous, the master continue reading...

Hello ChibiOS

Hello ChibiOS

One of most important feature of ChibiOS is multi-threading. Oversimplifying, a thread could be imagined like a sequence of instructions (with associated a priority and a working area) and multi-threading means kernel can manage more than a thread independently, executing them in a parallel fashion even if there is a single core.

Achieving this requires Kernel must plan operation sequence: this task is called scheduling. We could act indirectly on this operation though priority levels. Priority follows a simple rule:

among all the threads ready for execution, the one continue reading...