7-segment display and STM32 using ChibiOS

7-segment display and STM32 using ChibiOS

1 A compact display driver: the MAX7219

We have already introduced MAX7219 in STM32, ChibiOS and a 8×8 LED Matrix, so we are going to jump directly to code section. For convenience we just report link to documentation:

MAX7219 Datasheet

Note that even if pins are arranged in a different way, pin-out remains the same of the 8×8 LED matrix.

2 Proposed demo

In this demo we are going to use Code-B decode to write with ease some number on our 8 digit 7-segment display.

2.1 Demo explained

In the demo shown in the video above we set up MAX7219 as normal operation mode, Code-B decode mode for each digit, scanning the whole display with the maximum display intensity. After that we use chVTGetSystemTime() to get system time and with simple operation we compute milliseconds, seconds, minutes and hours since ChibiOS is alive. continue reading…

STM32, ChibiOS and a 8×8 LED Matrix

STM32, ChibiOS and 8x8 LED Matrix

1 A compact display driver: the MAX7219

The MAX7219 is a compact, serial input/parallel output common-cathode display driver. Included on-chip there are a BCD code-B decoder, the multiplex scan circuitry, segment and digit drivers, and an 8×8 static RAM that stores each digit. Only one external resistor is required to set the segments current.

1.1 Common uses

LED matrix DIY kit
Fig.1 – A 8×8 LED matrix DIY kit.

This chip is often used to drive 7-segment display having up to 8 digits or up to 64 individual LEDs. It is not unusual find this chip in DIY kits to be mounted on a small PCBs like that used in this article (See Fig. 1).

This chip could be found in different packages and uses a non-standard SPI (Data is clocked even if CS remains high but is needed a low to high transition to complete communication.If you are not familiar with SPI communication read Meeting SPI). MAX7221 is similar to MAX7219 except for two parameters:

  1. MAX7221 segment drivers are slew-rate limited to reduce electromagnetic interference;
  2. its serial interface is fully SPI compatible.

continue reading…

A Radio Frequency transceiver library: nRF24L01 and ChibiOS/RT

A Radio Frequency transceiver library nRF24L01 and ChibiOS/RT

1 Cheapest and most popular RF transceiver than ever

The nRF24L01 is one of the most popular RF transceiver as it is very cheap and it could be found already configured on small PCBs with needed passive components. This means that only a MCU is needed to design a radio system with the nRF24L01.

1.1 Description

The nRF24L01 is a highly integrated, ultra low power 2Mbps RF transceiver IC for the 2.4GHz ISM band. It provides an hardware protocol accelerator, the Enhanced ShockBurst, enabling the implementation of advanced and robust wireless connectivity with low cost MCUs.

1.2 Documentation

By this article we want to provide a full library for nRF24L01 compatible with ChibiOS/RT 3.0 ad a demo. That requires, as always, a preliminary read of the device datasheet.

nRF24L01 Datasheet

2 Features

2.1 Design and connections

nRF24L01 pin map
Fig.1 – The pin map of a nRF24L01 transceiver.

With peak RX/TX currents lower than 14mA, a sub μA power down mode, advanced power management, and a 1.9 to 3.6V supply range, the nRF24L01 provides a true ULP solution enabling months to years of battery lifetime when running on coin cells or AA/AAA batteries. The nRF24L01 is configured and operated through the SPI and using this interface we can access to its register maps contains all configuration registers of this chip.

Still using SPI we can send command to the transceiver making it accessible in all its operation modes.The Enhanced ShockBurst is based on packet communication and supports various modes from manual operation to advanced autonomous protocol operation. Internal FIFOs ensure a smooth data flow between the radio front end and the system’s MCU. The radio front end uses GFSK modulation and has user configurable parameters like frequency channel, output power and air data rate.

2.2 Pin Description

Just few pin are required to use this transceiver:2 pin for power supply, 4 pin for SPI communication and 2 additional pins for IRQ and CE. Follows the detailed pin map:

  1. GND, connection to ground
  2. VCC, power supply 1.9~3.6V DC
  3. CE, Chip enable used to perform some operation
  4. CSN, SPI chip select
  5. SCK, SPI serial clock
  6. MOSI, SPI MOSI
  7. MISO, SPI MISO
  8. IRQ, interrupt request pin

2.3 Enhanced ShockBurst

Enhanced ShockBurst is a packet based data link layer. It features automatic packet assembly and timing, automatic acknowledgement and re-transmissions of packets. It enables the implementation of ultra low power, high performance communication with low cost host MCUs. The features enable significant improvements of power efficiency for bi-directional and uni-directional systems, without adding complexity on the host controller side. This data link layer is enough complex and a reader can found a whole chapter (Chapter 7) about this argument on nRF24L01 reference manual.

Anyway, from our point of view we just need to know few thinks:

  1. We can set-up Enhanced ShockBurst using some commands clocked thought the SPI;
  2. Every receiver and transmitter need for a unique address which lenght is 5 bytes;
  3. Enhanced ShockBurst allows multiceiving (receive from 6 different addresses simultaneously);
  4. Max payload lenght is 32 bytes;
  5. Receiver is able to auto-detect payload lenght;

In this first library version we will not consider the multiceiver option: this requires just some additional APIs, but testing and debuging part would be much more difficult. continue reading…